The Synopsys DesignWare Prototyping team in Porto, Portugal is part of a worldwide prototyping team responsible for the development of Linux software drivers, application examples, prototyping environments, hardware validation and compliance testing of the Synopsys DesignWare Interface IPs protocol controllers (i.e. : PCIe, SATA, HDMI, MIPI) products.
Synopsys is seeking a creative, ambitious and talented engineer to fill a R&D Engineer Intern role in the Prototyping team for Hardware tests automation.
- Learns to use professional concepts and applies company procedures and guidelines to resolve issues related with the scholarship plan.
- Follows standard practices and specific, outlined, and detailed procedures in analyzing situations or data from which answers can be readily obtained.
- Receives detailed instructions on the trainee work, which is reviewed regularly by a direct mentor/experienced engineer.
- Jenkins hardware node setup and network setup, automation flow integration, linux batch scripts development.
- Analysis of hardware boards design documentation and software specifications.
- Writing technical documentation and presentations on developed Automation scripts and flow.
The ideal candidate will have:
- A relevant degree in electronic engineering or software engineering
- Knowledge base generally acquired from a college degree or equivalent course training.
- Basic knowledge of Verilog hardware description language and verification methodologies.
- Basic knowledge of ASIC and FPGA design flows is desirable.
- Basic knowledge of embedded software development flow
- Basic knowledge of Linux OS Kernel building and drivers development is a plus
- Basic development skills in C/C++ language is desirable.
- Knowledge of Jenkins automation tool.
- Excellent English communication skills.
- Has strong desire to learn and explore.
- Previous professional experience is valued but is not required.
12 months period, to complete a pre-defined project in engineering area.